MiRelay

Application Note: Reed Relay Matrix Design for ICT and PCB Test Equipment

In-circuit test / PCB flying-probe and fixture scanners

Application Note: Reed Relay Matrix Design for ICT and PCB Test Equipment

Dense reed relay matrices support large ICT channel counts with fast switching, stable low-level signal behavior and long service life.

Application note based on MiRelay internal application manuscripts and product reference files. Always confirm final limits against the exact datasheet and your validation plan.

Application challenge

  • A fully loaded ICT system may contain thousands of switching points; even a small component defect rate affects system yield.
  • The test fixture must switch continuity, shorts, analog measurements and sometimes high-voltage stress tests.
  • Relay footprint and channel density directly affect PCB cost and scanner size.

Design approach

  • Use compact SIP, MSIP, VSIP or VN packages for dense low-voltage measurement matrices.
  • Reserve HVR or other high-voltage reed relays for hipot, isolation or fixture discharge channels.
  • Build the matrix with serviceability in mind: relay group labels, replaceable boards and clear channel mapping reduce downtime.
  • Specify dynamic relay testing and incoming inspection because ICT equipment magnifies component-level defect rates.
Engineering caution: catalog ratings are component-level references. For high-voltage, medical, EV, PV or ATE systems, verify creepage, clearance, leakage, thermal rise, EMC and lifetime in the finished equipment.

Related MiRelay series

SIP, MSIP, VSIP and VN series address density and high-cycle switching; HVR is used where the ICT system also performs high-voltage insulation checks.

Series mentioned: SIP, MSIP, VSIP, VN, HVR high-voltage relays

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